最简单的就是Ascii,地球人都知道,NASA官方指定产品
这涉及到低级语言方面的内容了,现在大家用的都是高级语言,如果你是学计算机,而且想从事类似手机开发之类的,你就会接触到这方面的东西,cpu实际就是一个执行二进制语言的东西,简单的解释一下,每一段内存命令都是8位16进制数字组成,前两位代表op code,后面是mem address,而cpu就是通过这些指令执行的,当然还涉及到其他很多类似cpu的ALU ACC DataBus等等方面的东西
蛋疼的话你可以看看下面的高级语言对应低级语言的东西。。
memory mem.main_mem
0/ 20000100 # ACC <- M[100]
1/ 14000102 # ACC <- ACC mod 2
2/ 41000008 # BZ 8
3/ 20000100 # ACC <- M[100]
4/ 12000103 # ACC <- ACC * 3
5/ 10000101 # ACC <- ACC + 1
6/ 21000100 # ACC -> M[100]
7/ 40000001 # B 1
8/ 20000100 # ACC <- M[100]
9/ 13000102 # ACC <- ACC / 2
a/ 21000100 # ACC -> M[100]
b/ 11000101 # ACC <- ACC - 1
c/ 4100000e # BZ e
d/ 40000000 # B 0
e/ bbbbbbbb # undefined
100/ 5
101/ 1
102/ 2
103/ 3
memory control.microcode
# bits function hex mask
# 0,1,2,3 ALU function 000f
# 4 ALU register enable 0010
# 5 ALU output enable 0020
# 6 Memory address register enable 0040
# 7 Memory write enable 0080
# 8 Memory output enable 0100
# 9,10 unused 0600
# 11 PC output enable 0800
# 12 branch always 1000
# 13 branch zero 2000
# 14 immediate output enable 4000
# 15 next instruction 8000
# where
# ALU functions
# 0: add, 1: sub, 2: mlt, 3: div,
# 4: rem, 5: bus, 6: 0, 7: 0
# PC operations
# 0: PC <- 0, 1: PC <- PC + 1, 2: PC <- bus, 3: PC unchanged
# reset
0/ 3000 # set PC to zero
1/ 0840 # memory address register <- 0
2/ 8100 # instruction register <- M[0]; PC <- 1; uPC <- 0
#ALU instructions
# op code 10: ACC <- ACC + M[imm]
1000/ 4040 # memory address register <- imm
1001/ 0110 # ACC <- ACC + M[imm]
1002/ 0840 # memory address register <- PC
1003/ 8100 # fetch next instruction and increment PC
# op code 11: ACC <- ACC - M[imm]
1100/ 4040 0111 0840 8100
# op code 12: ACC <- ACC * M[imm]
1200/ 4040 0112 0840 8100
# op code 13: ACC <- ACC / M[imm]
1300/ 4040 0113 0840 8100
# op code 14: ACC <- ACC % M[imm]
1400/ 4040 0114 0840 8100
# op code 15: ACC <- M[imm] (same as op code 20, commented there)
1500/ 4040 0115 0840 8100
# op code 16: ACC <- 0
1600/ 4040 0116 0840 8100
# op code 17: ACC <- 0 (same as op code 16)
1700/ 4040 0116 0840 8100
# op code 20: ACC <- M[imm]
2000/ 4040 # memory address register <- imm
2001/ 0115 # ACC <- M[imm]
2002/ 0840 # memory address register <- PC
2003/ 8100 # fetch next instruction and increment PC
# op code 21: M[imm] <- ACC
# to be cautious, I leave the memory data on the bus during the
# cycle that memory write enable is de-asserted.
2100/ 4040 # memory address register <- imm
2101/ 00a0 # M[imm] <- ACC
2102/ 0020 # ALU out enabled
2103/ 0840 # memory address register <- PC
2104/ 8100 # fetch next instruction and increment PC
# op code 40: PC <- imm
4000/ 5000 0840 8100
# op code 41: PC <- if ACC==0 then imm else PC+1
4100/ 6000 # PC <- imm if ACC==0
4101/ 0840 8100 # fetch next instruction and increment PC
# op code BC: a mystery instruction
BC00/4010
BC01/0060
BC02/0115
BC03/0840
BC04/8100 |